Notes-
1. t
0
is minimum total cycle, t
2
is minimum DIOR-/DIOW- assertion time, and t
2i
is the minimum
DIOR-/DIOW- negation time. A host implementation shall lengthen t
2i
to ensure that t
0
is equal to or
greater than the value reported in the devices IDENTIFY DEVICE data. A device implementation
shall support any length host implementation.
2. This parameter specifies the time from the negation edge of DIOR- to the time that the data is
released by the device.
3. The delay from the activation of FIOR- or DIOW- until the state of IORDY is first sampled. If
IORDY is inactive then the host shall wait until IORDY is active before the PIO cycle is complete. If
the device is not driving IORDY negated at the t
A
after the activation of DIOR-
or DIOW-, that t
5
shall be met and t
RD
is not applicable. If the device is driving IORDY
negated at the time t
A
after the activation of DIOR- or DIOW-, then tRD shall be met and t
5
is not
applicable.
4. Mode may be selected at the highest mode for the device if CS(1:0) and DA(2:0) do not change
between read or write cycle or selects at the highest mode supported by the slowest device if CS(1:0)
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